KiRequestDispatchInterrupt宏定义和nt!KiIpiServiceRoutine函数到hal!HalRequestSoftwareInterrupt

KiRequestDispatchInterrupt宏定义和nt!KiIpiServiceRoutine函数到hal!HalRequestSoftwareInterrupt

#define KiRequestDispatchInterrupt(Processor) \
if (KeGetCurrentProcessorNumber() != Processor) { \
KiIpiSend(AFFINITY_MASK(Processor), IPI_DPC); \
}

相应的：
#define KiRequestApcInterrupt(Processor) \
if (KeGetCurrentProcessorNumber() == Processor) { \
KiRequestSoftwareInterrupt(APC_LEVEL); \
} else { \
KiIpiSend(AFFINITY_MASK(Processor), IPI_APC); \
}
相应的：

VOID
KiIpiSend (
IN KAFFINITY TargetSet,
IN KIPI_REQUEST Request
)
{

#if !defined(NT_UP)

PKPRCB NextPrcb;
ULONG Processor;
KAFFINITY SummarySet;

ASSERT(KeGetCurrentIrql() >= DISPATCH_LEVEL);

//
// Loop through the target set of processors and merge the request into
// the request summary of the target processors.
//
// N.B. It is guaranteed that there is at least one bit set in the target
// set.
//

ASSERT(TargetSet != 0);

SummarySet = TargetSet;
BitScanForward64(&Processor, SummarySet);
do {
NextPrcb = KiProcessorBlock[Processor];
InterlockedOr64((LONG64 volatile *)&NextPrcb->RequestSummary, Request);
SummarySet ^= AFFINITY_MASK(Processor);
} while (BitScanForward64(&Processor, SummarySet) != FALSE);

//
// Request interprocessor interrupts on the target set of processors.
//

HalRequestIpi(TargetSet);

#else

UNREFERENCED_PARAMETER(TargetSet);
UNREFERENCED_PARAMETER(Request);

#endif

return;
}

VOID
HalRequestIpi (
IN KAFFINITY Affinity
)
{

ULONG flags;
KAFFINITY Self;

//
// If the target set of processors is the complete set of processors,
// then use the broadcast capability of the APIC. Otherwise, send the
// IPI to the individual processors.
//

Self = KeGetCurrentPrcb()->SetMember;
if ((Affinity | Self) == HalpActiveProcessors) {
flags = HalpDisableInterrupts();
HalpStallWhileApicBusy();
if ((Affinity & Self) != 0) {
LOCAL_APIC(LU_INT_CMD_LOW) = APIC_BROADCAST_INCL;

} else {
LOCAL_APIC(LU_INT_CMD_LOW) = APIC_BROADCAST_EXCL;
}

HalpStallWhileApicBusy();
HalpRestoreInterrupts(flags);

} else {
HalpSendIpi(Affinity, APIC_IPI);
}

return;
}

VOID
FASTCALL
HalpSendIpi (
IN KAFFINITY Affinity,
IN ULONG Command
)
{
ULONG flags;

//
// Disable interrupts and call the appropriate routine.
//
// BUGBUG the compiler generates terrible code for this,
// most likely because of the inline _asm{} block generated
// by HalpDisableInterrupts().
//
// Ideally we could talk the x86 compiler team into giving
// us an intrinsic like the AMD64 compiler's __getcallerseflags()
//

flags = HalpDisableInterrupts();
HalpIpiRoutine(Affinity,Command);
HalpRestoreInterrupts(flags);
}

0: kd> g
Breakpoint 16 hit
eax=00000001 ebx=00000102 ecx=00000002 edx=00000000 esi=f7737120 edi=00000000
eip=804ee4f8 esp=f78e6ca0 ebp=f78e6cc4 iopl=0 nv up ei pl nz na po nc
cs=0008 ss=0010 ds=0023 es=0023 fs=0030 gs=0000 efl=00000202
hal!HalRequestSoftwareInterrupt:
804ee4f8 643a0d95000000 cmp cl,byte ptr fs:[95h] fs:0030:00000095=00
1: kd> kc 2
#
00 hal!HalRequestSoftwareInterrupt
01 nt!KiIpiServiceRoutine

cPublicProc _KiIpiServiceRoutine, 2

ifndef NT_UP

cPublicFpo 2, 3
push ebx ; save nonvolatile registers
push esi ;
push edi ;

xor ebx, ebx ; set exchange value
xor edi, edi
mov esi, PCR[PcPrcb] ; get current processor block address

xchg dword ptr [esi].PbRequestSummary, ebx
xchg dword ptr [esi].PbSignalDone, edi
;
; Check for freeze request or synchronous request.
;

test bl, IPI_FREEZE + IPI_SYNCH_REQUEST ; test for freeze or packet
jnz short isr50 ; if nz, freeze or synch request

;
; For RequestSummary's other then IPI_FREEZE set return to TRUE
;

mov bh, 1 ; set return value

;
; Check for Packet ready.
;
; If a packet is ready, then get the address of the requested function
; and call the function passing the address of the packet address as a
; parameter.
;

isr10: mov edx, edi ; copy request pack address
and edx, NOT 1 ; Clear point to point bit
jz short isr20 ; if z set, no packet ready
push [edx].PbCurrentPacket + 8 ; push parameters on stack
push [edx].PbCurrentPacket + 4 ;
push [edx].PbCurrentPacket + 0 ;
push edi ; push source processor block address
mov eax, [edx].PbWorkerRoutine ; get worker routine address
mov edx, [esp + 16 + 4*4] ; get current trap frame address
mov [esi].PbIpiFrame, edx ; save current trap frame address
call eax ; call worker routine
mov bh, 1 ; set return value

;
; Check for APC interrupt request.
;

isr20: test bl, IPI_APC ; check if APC interrupt requested
jz short isr30 ; if z, APC interrupt not requested

mov ecx, APC_LEVEL ; request APC interrupt
fstCall HalRequestSoftwareInterrupt ;

;
; Check for DPC interrupt request.
;

isr30: test bl, IPI_DPC ; check if DPC interrupt requested
jz short isr40 ; if z, DPC interrupt not requested

mov ecx, DISPATCH_LEVEL ; request DPC interrupt
fstCall HalRequestSoftwareInterrupt ;

isr40: mov al, bh ; return status
pop edi ; restore nonvolatile registers
pop esi ;
pop ebx ;

stdRET _KiIpiServiceRoutine