scalar参数在顶层接口中综合说明
一、将scalar标量约束为ap_none
void array_FIFO (dout_t d_o[4], volatile din_t d_i, didx_t idx[4]) {
#pragma HLS INTERFACE ap_none register port=d_i
int i;
// Breaks FIFO interface d_o[3] = d_i[2];
For_Loop: for (i=0;i<4;i++) {
d_o[i] = d_i;
}
}
约束为ap_none，是常规做法，没有什么特别的地方。
二、将scalar标量约束为ap_stable
这里可以忽略不说，和ap_none一样
三、将scalar标量约束为ap_ack
void array_FIFO (dout_t d_o[4], volatile din_t d_i, didx_t idx[4]) {
//#pragma HLS INTERFACE axis register both port=d_i
#pragma HLS INTERFACE ap_ack register port=d_i
//#pragma HLS INTERFACE s_axilite register depth=4 port=d_i
int i;
// Breaks FIFO interface d_o[3] = d_i[2];
For_Loop: for (i=0;i<4;i++) {
//d_o[i] = d_i[idx[i]];
//d_o[i] = d_i[i];
d_o[i] = d_i;
}
}
综合为input_data + output_ack
四、将scalar标量约束为ap_vld
void array_FIFO (dout_t d_o[4], volatile din_t d_i, didx_t idx[4]) {
//#pragma HLS INTERFACE axis register both port=d_i
#pragma HLS INTERFACE ap_vld register port=d_i
//#pragma HLS INTERFACE s_axilite register depth=4 port=d_i
int i;
// Breaks FIFO interface d_o[3] = d_i[2];
For_Loop: for (i=0;i<4;i++) {
//d_o[i] = d_i[idx[i]];
//d_o[i] = d_i[i];
d_o[i] = d_i;
}
}
综合为input_data + input_vld
五、将scalar标量约束为ap_hs
void array_FIFO (dout_t d_o[4], volatile din_t d_i, didx_t idx[4]) {
//#pragma HLS INTERFACE axis register both port=d_i
#pragma HLS INTERFACE ap_hs register port=d_i
//#pragma HLS INTERFACE s_axilite register depth=4 port=d_i
int i;
// Breaks FIFO interface d_o[3] = d_i[2];
For_Loop: for (i=0;i<4;i++) {
//d_o[i] = d_i[idx[i]];
//d_o[i] = d_i[i];
d_o[i] = d_i;
}
}
综合为input_data + input_vld + output_ack
六、将scalar标量约束为axis
这个非常不建议，这个可以看我其他博客，有对这块的讨论和说明，帮你避坑！！
七、将scalar标量约束为axilite
将标量综合为寄存器，这个比较简单没有什么特别说明的。
八、总结
将scalar标量约束为axis，这个不要用，不要用，不要用！！！违法了 常识！